/*
 * (C) Copyright 2009, 2010
 * Allied Telesis <www.alliedtelesis.com>
 * Marvell Semiconductor <www.marvell.com>
 * Written-by: Prafulla Wadaskar <prafulla@marvell.com>
 *
 * Header file for the Marvell's Sheeva CPU core.
 *
 * See file CREDITS for list of people who contributed to this
 * project.
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License as
 * published by the Free Software Foundation; either version 2 of
 * the License, or (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
 * MA 02110-1301 USA
 */

/* based on include/asm/arch-kirkwood/kirkwood.h */

#ifndef _ASM_ARCH_DISCOVERY_H
#define _ASM_ARCH_DISCOVERY_H

#ifndef __ASSEMBLY__
#include <asm/types.h>
#include <asm/io.h>
#endif /* __ASSEMBLY__ */

#if defined (CONFIG_SHEEVA_88SV571_VD)
#include <asm/arch/cpu.h>

/* SOC specific definations */
#define INTREG_BASE			0xd0000000
#define DISCO_REGISTER(x)		(DISCO_REGS_PHY_BASE + x)
#define DISCO_OFFSET_REG		(INTREG_BASE + 0x20080)

/* undocumented registers */
#define DISCO_REG_UNDOC_0x1470		(DISCO_REGISTER(0x1470))
#define DISCO_REG_UNDOC_0x1478		(DISCO_REGISTER(0x1478))

#define DISCO_TWSI0_BASE		(DISCO_REGISTER(0x11000))
#define DISCO_TWSI1_BASE		(DISCO_REGISTER(0x11100))
#define DISCO_UART0_BASE		(DISCO_REGISTER(0x12000))
#define DISCO_UART1_BASE		(DISCO_REGISTER(0x12100))
#define DISCO_MPP_BASE			(DISCO_REGISTER(0x10000))
#define DISCO_GPIO_BASE			(DISCO_REGISTER(0x10100))
#define DISCO_DEV_BUS_BASE		(DISCO_REGISTER(0x10400))
//#define DISCO_NANDF_BASE		(DISCO_REGISTER(0x10418))
#define DISCO_SPI_BASE			(DISCO_REGISTER(0x10600))
#define DISCO_CPU_WIN_BASE		(DISCO_REGISTER(0x20000))
#define DISCO_CPU_REG_BASE		(DISCO_REGISTER(0x20100))
#define DISCO_CPU_INTR_BASE		(DISCO_REGISTER(0x20200))
#define DISCO_TIMER_BASE		(DISCO_REGISTER(0x20300))
#define DISCO_REG_PCIE0_BASE		(DISCO_REGISTER(0x40000))
#define DISCO_USB20_0_BASE		(DISCO_REGISTER(0x50000))
#define DISCO_USB20_1_BASE		(DISCO_REGISTER(0x51000))
#define DISCO_EGIGA0_BASE		(DISCO_REGISTER(0x72000))
#define DISCO_EGIGA1_BASE		(DISCO_REGISTER(0x76000))
#define DISCO_REG_PCIE1_BASE		(DISCO_REGISTER(0x80000))

#if defined (CONFIG_MV78100)
#include <asm/arch/mv78100.h>
#else
#error "SOC Name not defined"
#endif /* CONFIG_MV78100 */

#endif /* CONFIG_SHEEVA_88SV571_VD */

#endif /* _ASM_ARCH_DISCOVERY_H */
