/*
 * (C) Copyright 2002
 * Brad Kemp, Seranoa Networks, Brad.Kemp@seranoa.com
 *
 * See file CREDITS for list of people who contributed to this
 * project.
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License as
 * published by the Free Software Foundation; either version 2 of
 * the License, or (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
 * MA 02111-1307 USA
 */

#include <common.h>
#include <asm/processor.h>
#include <bootmenu.h>

#ifndef CONFIG_SYS_NO_FLASH

#undef  DEBUG_FLASH
//#define DEBUG_FLASH 1
#if DEBUG_FLASH
#define DEBUGF(x...) printf(x)
#else
#define DEBUGF(x...)
#endif

/*
 * This file implements a Common Flash Interface (CFI) driver for ppcboot.
 * The width of the port and the width of the chips are determined at initialization.
 * These widths are used to calculate the address for access CFI data structures.
 * It has been tested on an Intel Strataflash implementation.
 *
 * References
 * JEDEC Standard JESD68 - Common Flash Interface (CFI)
 * JEDEC Standard JEP137-A Common Flash Interface (CFI) ID Codes
 * Intel Application Note 646 Common Flash Interface (CFI) and Command Sets
 * Intel 290667-008 3 Volt Intel StrataFlash Memory datasheet
 *
 * TODO
 * Use Primary Extended Query table (PRI) and Alternate Algorithm Query Table (ALT) to determine if protection is available
 * Add support for other command sets Use the PRI and ALT to determine command set
 * Verify erase and program timeouts.
 */

#define FLASH_CMD_CFI			0x98
#define FLASH_CMD_READ_ID		0x90
#define FLASH_CMD_RESET			0xff
#define FLASH_CMD_BLOCK_ERASE		0x20
#define FLASH_CMD_ERASE_CONFIRM		0xD0
#define FLASH_CMD_WRITE			0x40

#define FLASH_CMD_PROTECT_SET		0x00
#define FLASH_CMD_PROTECT_CLEAR		0x01

#define FLASH_CMD_CLEAR_STATUS		0x50
#define FLASH_CMD_WRITE_TO_BUFFER       0xE8
#define FLASH_CMD_WRITE_BUFFER_CONFIRM  0xD0

#define FLASH_STATUS_DONE		0x80
#define FLASH_STATUS_ESS		0x40
#define FLASH_STATUS_ECLBS		0x20
#define FLASH_STATUS_PSLBS		0x10
#define FLASH_STATUS_VPENS		0x08
#define FLASH_STATUS_PSS		0x04
#define FLASH_STATUS_DPS		0x02
#define FLASH_STATUS_R			0x01
#define FLASH_STATUS_PROTECT		0x01

#define FLASH_OFFSET_CFI		0x55
#define FLASH_OFFSET_CFI_RESP		0x10
#define FLASH_OFFSET_WTOUT		0x1F
#define FLASH_OFFSET_WBTOUT             0x20
#define FLASH_OFFSET_ETOUT		0x21
#define FLASH_OFFSET_CETOUT             0x22
#define FLASH_OFFSET_WMAX_TOUT		0x23
#define FLASH_OFFSET_WBMAX_TOUT         0x24
#define FLASH_OFFSET_EMAX_TOUT		0x25
#define FLASH_OFFSET_CEMAX_TOUT         0x26
#define FLASH_OFFSET_SIZE		0x27
#define FLASH_OFFSET_INTERFACE          0x28
#define FLASH_OFFSET_BUFFER_SIZE        0x2A
#define FLASH_OFFSET_NUM_ERASE_REGIONS	0x2C
#define FLASH_OFFSET_ERASE_REGIONS	0x2D
#define FLASH_OFFSET_PROTECT		0x02
#define FLASH_OFFSET_USER_PROTECTION    0x85
#define FLASH_OFFSET_INTEL_PROTECTION   0x81


#define FLASH_MAN_CFI			0x01000000


typedef union {
	unsigned char c;
	unsigned short w;
	unsigned long l;
} cfiword_t;

typedef union {
	unsigned char * cp;
	unsigned short *wp;
	unsigned long *lp;
} cfiptr_t;

#define NUM_ERASE_REGIONS 4

flash_info_t	flash_info[CONFIG_SYS_MAX_FLASH_BANKS]; /* info for FLASH chips	*/


/*-----------------------------------------------------------------------
 * Functions
 */
static ulong flash_get_size(vu_long * addr, flash_info_t * info);

/*-----------------------------------------------------------------------
 * create an address based on the offset and the port width
 */
inline void * flash_make_addr(flash_info_t * info, int sect, int offset)
{
	return ((uchar *)(info->start[sect] + (offset * info->portwidth)));
}

inline void * flash_make_query_addr(flash_info_t *info, int sect, int offset)
{
	return ((uchar *)(info->start[sect] + (offset * info->portwidth)));
//    return (void*)(info->start[sect] + (offset * info->portwidth));
}

/*-----------------------------------------------------------------------
 * read a character at a port width address
 */
uchar flash_read_uchar(flash_info_t * info,int sect,int offset)
{
	cfiptr_t cptr;
	int shiftbit;
	switch(info->portwidth) {
	    case FLASH_CFI_8BIT:
		cptr.cp = flash_make_addr(info, sect, offset);
		return cptr.cp[0] & 0xFF;

	    case FLASH_CFI_16BIT:
		cptr.cp = flash_make_addr(info, sect, offset & ~0x01);
		shiftbit = (offset&0x01)?0:8;
		return (cptr.wp[0]>>shiftbit) & 0xFF;

	    case FLASH_CFI_32BIT:
		cptr.cp = flash_make_addr(info, sect, offset & ~0x03);
		shiftbit = ((3 - (offset&0x03)) << 3);
		return (cptr.lp[0]>>shiftbit) & 0xFF;
	    default:
		return 0;
	}
	return 0;
}

uchar flash_read_query_uchar(flash_info_t * info,int sect,int offset)
{
    cfiptr_t cptr;
    cptr.cp = flash_make_query_addr(info, sect, offset);
    switch(info->portwidth) {
	case FLASH_CFI_8BIT:  /* 01 */
	    return cptr.cp[0] & 0xFF;
	case FLASH_CFI_16BIT: /* 0001 or 0101 */
	    return cptr.wp[0] & 0xFF;
	case FLASH_CFI_32BIT: /* 00000001 or 00010001 or 00000001 */
	    return cptr.lp[0] & 0xFF;
	default:
	    return 0;
	}
	return 0;
}

/*-----------------------------------------------------------------------
 * read a short word by swapping for ppc format.
 */
ushort flash_read_ushort(flash_info_t * info, int sect,int offset)
{
	cfiptr_t cptr;
	int tmp;
	switch(info->portwidth) {
	case FLASH_CFI_8BIT:
		cptr.cp = flash_make_addr(info, sect, offset);
		return ((cptr.cp[0]&0xFF)<<8)|cptr.cp[1];

	case FLASH_CFI_16BIT: /* 1234 */
		cptr.cp = flash_make_addr(info, sect, offset & ~0x01);
		if( offset & 0x01 ) {
			tmp = (cptr.wp[0]&0xFF)<<8;
			return tmp | ((cptr.wp[1]>>8)&0xFF);
		} else {
			return cptr.wp[0]; /* 1234 */
		}

	case FLASH_CFI_32BIT: /* read data = |1234|5678| */
		cptr.cp = flash_make_addr(info, sect, offset & ~0x03);
		switch(offset&0x03) {
		case 0:
			return (cptr.lp[0] >> 16)&0xFFFF;
		case 1:
			return (cptr.lp[0] >> 8 )&0xFFFF;
		case 2:
			return (cptr.lp[0]      )&0xFFFF;
		case 3:
			tmp = (cptr.lp[0]&0xFF)<<8;
			return tmp | ((cptr.lp[0]>>24)&0xFF);
		}

	default:
		return 0;
	}
	return 0;
}
 
ushort flash_read_query_ushort(flash_info_t * info,int sect,int offset)
{
	cfiptr_t cptr;
	cptr.cp = flash_make_query_addr(info, sect, offset);
	switch(info->portwidth) { /* x01 , x00 */
	case FLASH_CFI_8BIT:
		return ( (cptr.cp[1]&0xFF) << 8) | ((cptr.cp[0]&0xFF));
	case FLASH_CFI_16BIT:
		return ( (cptr.wp[1]&0xFF) << 8) | ((cptr.wp[0]&0xFF));
	case FLASH_CFI_32BIT:
		return ( (cptr.lp[1]&0xFF) << 8) | ((cptr.lp[0]&0xFF));
	default:
		return 0;
	}
	return 0;
}

/*-----------------------------------------------------------------------
 * read a long word by picking the least significant byte of each maiximum
 * port size word. Swap for ppc format.
 */
ulong flash_read_ulong(flash_info_t * info,int sect,int offset)
{
	cfiptr_t cptr;
	int tmp;
	switch(info->portwidth) {
	case FLASH_CFI_8BIT:
		cptr.cp = flash_make_addr(info, sect, offset);
		return ((cptr.cp[0]&0xFF)<<24) | ((cptr.cp[1]&0xFF)<<16) |
		       ((cptr.cp[2]&0xFF)<< 8) | (cptr.cp[3]&0xFF);

	case FLASH_CFI_16BIT:
		cptr.cp = flash_make_addr(info, sect, offset & ~0x01);
		if( offset & 0x01 ){
			tmp = (cptr.wp[0]&0xFF)<<24;
			return tmp | ((cptr.wp[1]&0xFFFF)<<8) |
			       ((cptr.wp[2]>>8)&0xFF);
		} else {
			return ((cptr.wp[0]&0xFFFF)<<16)|(cptr.wp[1]&0xFFFF);
		}

	case FLASH_CFI_32BIT:
		cptr.cp = flash_make_addr(info, sect, offset & ~0x03);
		switch(offset&0x03) {
		case 0:
			return cptr.lp[0];
		case 1:
			return ((cptr.lp[0]&0xFFFFFF)<<8) |
			       ((cptr.lp[1]>>24)&0xFF);
		case 2:
			return ((cptr.lp[0]&0xFFFF)<<16) |
			       ((cptr.lp[1]>>16)&0xFFFF);
		case 3:
			return ((cptr.lp[0]&0xFF)<<24) |
			       ((cptr.lp[1]>>8)&0xFFFFFF);
		}

	default:
		return 0;
	}
	return 0;
}
 
ulong flash_read_query_ulong(flash_info_t * info,int sect,int offset)
{
	cfiptr_t cptr;
	cptr.cp = flash_make_query_addr(info, sect, offset);
	switch(info->portwidth) { /* x00 x01 x02 x03 */
	case FLASH_CFI_8BIT:
		return ((cptr.cp[3]&0xFF) << 24) | ((cptr.cp[2]&0xFF) << 16) |
	               ((cptr.cp[1]&0xFF) <<  8) | ((cptr.cp[0]&0xFF));
	case FLASH_CFI_16BIT:
		return ((cptr.wp[3]&0xFF) << 24) | ((cptr.wp[2]&0xFF) << 16) |
		       ((cptr.wp[1]&0xFF) <<  8) | ((cptr.wp[0]&0xFF));
	case FLASH_CFI_32BIT:
		return ((cptr.lp[3]&0xFF) << 24) | ((cptr.lp[2]&0xFF) << 16) |
		       ((cptr.lp[1]&0xFF) <<  8) | ((cptr.lp[0]&0xFF));
	default:
		return 0;
	}
	return 0;
}

/*-----------------------------------------------------------------------
 */
unsigned long flash_init (void)
{
	static unsigned long size = 0;
	int i;
	unsigned long  address;

	if( size ) return size;

	/* The flash is positioned back to back, with the demultiplexing of the chip
	 * based on the A24 address line.
	 *
	 */

	address = PHYS_FLASH_1;
	size = 0;

	/* Init: no FLASHes known */
	for (i=0; i<CONFIG_SYS_MAX_FLASH_BANKS; ++i) {
		flash_info[i].flash_id = FLASH_UNKNOWN;
		flash_info[i].portwidth = CONFIG_SYS_FLASH_PORTWIDTH;
		size += flash_info[i].size = flash_get_size((vu_long *)address, &flash_info[i]);
		DEBUGF("## FLASH i %d addr = 0x%08lx size %08lx\n",i, address, size);
		address += flash_info[i].size;
		if (flash_info[0].flash_id == FLASH_UNKNOWN) {
			printf ("## Unknown FLASH on Bank %d - Size = 0x%08lx = %ld MB\n",i,
				flash_info[0].size, flash_info[i].size<<20);
		}
	}

	/* monitor protection ON by default */
	flash_protect (FLAG_PROTECT_SET,
		       - CONFIG_SYS_MONITOR_LEN,
		       - 1, &flash_info[1]);

	return (size);
}

static int wait_for_DQ7(flash_info_t * info, int sect)
{
	ulong start, now, last;
	volatile CONFIG_SYS_FLASH_WORD_SIZE *addr =
		(CONFIG_SYS_FLASH_WORD_SIZE *) (info->start[sect]);

	start = get_timer(0);
	last = start;
	while ((addr[0] & (CONFIG_SYS_FLASH_WORD_SIZE) 0x00800080) !=
			(CONFIG_SYS_FLASH_WORD_SIZE) 0x00800080) {
		if ((now = get_timer(start)) > CONFIG_SYS_FLASH_ERASE_TOUT) {
			printf("Timeout\n");
			return -1;
		}
	}
	return 0;
}

/*-----------------------------------------------------------------------
 */
int flash_erase (flash_info_t *info, int s_first, int s_last)
{
	volatile CONFIG_SYS_FLASH_WORD_SIZE *addr = (CONFIG_SYS_FLASH_WORD_SIZE *)(info->start[0]);
	volatile CONFIG_SYS_FLASH_WORD_SIZE *addr2;
	int flag, prot, sect, retcode = 0;

	if ((s_first < 0) || (s_first > s_last)) {
		if (info->flash_id == FLASH_UNKNOWN)
			printf("- missing\n");
		else
			printf("- no sectors to erase\n");
		return 1;
	}

	if (info->flash_id == FLASH_UNKNOWN) {
		printf("Can't erase unknown flash type - aborted\n");
		return 1;
	}

	prot = 0;
	for (sect = s_first; sect <= s_last; ++sect) {
		if (info->protect[sect])
			prot++;
	}

	if (prot)
		printf("- Warning: %d protected sectors will not be erased!", prot);
	DEBUGF("## prot %d \n",prot);

	printf("\n");

	/* Disable interrupts which might cause a timeout here */
	flag = disable_interrupts();

	/* Start erase on unprotected sectors */
	for (sect = s_first; retcode == 0 && sect <= s_last; sect++) {
		if (info->protect[sect] == 0) {	/* not protected */
			addr2 = (CONFIG_SYS_FLASH_WORD_SIZE *) (info->start[sect]);

			addr[CONFIG_SYS_FLASH_ADDR0] = (CONFIG_SYS_FLASH_WORD_SIZE) 0x00AA00AA;
			addr[CONFIG_SYS_FLASH_ADDR1] = (CONFIG_SYS_FLASH_WORD_SIZE) 0x00550055;
			addr[CONFIG_SYS_FLASH_ADDR0] = (CONFIG_SYS_FLASH_WORD_SIZE) 0x00800080;
			addr[CONFIG_SYS_FLASH_ADDR0] = (CONFIG_SYS_FLASH_WORD_SIZE) 0x00AA00AA;
			addr[CONFIG_SYS_FLASH_ADDR1] = (CONFIG_SYS_FLASH_WORD_SIZE) 0x00550055;
			addr2[0] = (CONFIG_SYS_FLASH_WORD_SIZE) 0x00300030;	/* sector erase */
			/*
			 * Wait for each sector to complete, it's more
			 * reliable.  According to AMD Spec, you must
			 * issue all erase commands within a specified
			 * timeout.  This has been seen to fail, especially
			 * if printf()s are included (for debug)!!
			 */
			retcode = wait_for_DQ7(info, sect);
			DEBUGF("## sec %d  retcode %d\n",sect, retcode);
		}
	}

	/* re-enable interrupts if necessary */
	if (flag)
		enable_interrupts();

	/* wait at least 80us - let's wait 1 ms */
	udelay(1000);

	/* reset to read mode */
	addr = (CONFIG_SYS_FLASH_WORD_SIZE *) info->start[0];
	addr[0] = (CONFIG_SYS_FLASH_WORD_SIZE) 0x00F000F0;	/* reset bank */

	printf(" done\n");
	return retcode;
}

void flash_print_info(flash_info_t * info)
{
	int i, k;
	int size, erased;
	volatile unsigned long *flash;

	if (info->flash_id == FLASH_UNKNOWN) {
		printf("missing or unknown FLASH type\n");
		return;
	}

	switch (info->flash_id & FLASH_VENDMASK) {
		case FLASH_MAN_AMD:
			printf("AMD ");
			break;
		case FLASH_MAN_FUJ:
			printf("FUJITSU ");
			break;
		default:
			printf("Unknown Vendor ");
			break;
	}

	switch (info->flash_id & FLASH_TYPEMASK) {
		case FLASH_S29GL128N:
			printf ("S29GL128N (256 Mbit, uniform sector size)\n");
			break;
		case FLASH_AM320B:
			printf ("29LV320B (32 Mbit, bottom boot sect)\n");
			break;
		case FLASH_AM320T:
			printf ("29LV320T (32 Mbit, top boot sect)\n");
			break;
		default:
			printf("Unknown Chip Type\n");
			break;
	}

	printf("  Size: %ld KB in %d Sectors\n",
			info->size >> 10, info->sector_count);

	printf("  Sector Start Addresses:");
	for (i = 0; i < info->sector_count; ++i) {
		/*
		 * Check if whole sector is erased
		 */
		if (i != (info->sector_count - 1))
			size = info->start[i + 1] - info->start[i];
		else
			size = info->start[0] + info->size - info->start[i];

		erased = 1;
		flash = (volatile unsigned long *)info->start[i];
		size = size >> 2;	/* divide by 4 for longword access */

		for (k = 0; k < size; k++) {
			if (*flash++ != 0xffffffff) {
				erased = 0;
				break;
			}
		}

		if ((i % 5) == 0)
			printf("\n   ");

		printf(" %08lX%s%s", info->start[i],
				erased ? " E" : "  ",
				info->protect[i] ? "RO " : "   ");
	}
	printf("\n");
	return;
}

static int write_word(flash_info_t * info, ulong dest, ulong data)
{
	volatile CONFIG_SYS_FLASH_WORD_SIZE *addr2 = (CONFIG_SYS_FLASH_WORD_SIZE *) (info->start[0]);
	volatile CONFIG_SYS_FLASH_WORD_SIZE *dest2 = (CONFIG_SYS_FLASH_WORD_SIZE *) dest;
	volatile CONFIG_SYS_FLASH_WORD_SIZE *data2 = (CONFIG_SYS_FLASH_WORD_SIZE *) &data;
	ulong start;
	int i, flag;

	/* Check if Flash is (sufficiently) erased */
	if ((*((vu_long *)dest) & data) != data) {
		bootmenu_printf("## not erased dest %08x\n",dest);
		return (2);
	}

	for (i = 0; i < 4 / sizeof(CONFIG_SYS_FLASH_WORD_SIZE); i++) {
		/* Disable interrupts which might cause a timeout here */
		flag = disable_interrupts();

		addr2[CONFIG_SYS_FLASH_ADDR0] = (CONFIG_SYS_FLASH_WORD_SIZE) 0x00AA00AA;
		addr2[CONFIG_SYS_FLASH_ADDR1] = (CONFIG_SYS_FLASH_WORD_SIZE) 0x00550055;
		addr2[CONFIG_SYS_FLASH_ADDR0] = (CONFIG_SYS_FLASH_WORD_SIZE) 0x00A000A0;

		dest2[i] = data2[i];

		/* re-enable interrupts if necessary */
		if (flag)
			enable_interrupts();

		/* data polling for D7 */
		start = get_timer(0);
		while ((dest2[i] & (CONFIG_SYS_FLASH_WORD_SIZE) 0x00800080) !=
				(data2[i] & (CONFIG_SYS_FLASH_WORD_SIZE) 0x00800080)) {

			if (get_timer(start) > CONFIG_SYS_FLASH_WRITE_TOUT) {
				bootmenu_printf("## not timeout writing to dest %08x\n",dest2[i]);
				return (1);
			}
		}
	}

	return (0);
}


/*-----------------------------------------------------------------------
 * Copy memory to flash, returns:
 * 0 - OK
 * 1 - write timeout
 * 2 - Flash not erased
 */
int write_buff(flash_info_t * info, uchar * src, ulong addr, ulong cnt)
{
	ulong cp, wp, data;
	int i, l, rc;

	wp = (addr & ~3);	/* get lower word aligned address */

	/*
	 * handle unaligned start bytes
	 */
	if ((l = addr - wp) != 0) {
		data = 0;
		for (i = 0, cp = wp; i < l; ++i, ++cp)
			data = (data << 8) | (*(uchar *) cp);

		for (; i < 4 && cnt > 0; ++i) {
			data = (data << 8) | *src++;
			--cnt;
			++cp;
		}

		for (; cnt == 0 && i < 4; ++i, ++cp)
			data = (data << 8) | (*(uchar *) cp);

		if ((rc = write_word(info, wp, data)) != 0)
			return (rc);

		wp += 4;
	}

	/*
	 * handle word aligned part
	 */
	while (cnt >= 4) {
		data = 0;
		for (i = 0; i < 4; ++i)
			data = (data << 8) | *src++;

		if ((rc = write_word(info, wp, data)) != 0)
			return (rc);

		wp += 4;
		cnt -= 4;
	}

	if (cnt == 0)
		return (0);

	/*
	 * handle unaligned tail bytes
	 */
	data = 0;
	for (i = 0, cp = wp; i < 4 && cnt > 0; ++i, ++cp) {
		data = (data << 8) | *src++;
		--cnt;
	}
	for (; i < 4; ++i, ++cp)
		data = (data << 8) | (*(uchar *) cp);

	return (write_word(info, wp, data));
}


/*-----------------------------------------------------------------------
 */
int flash_real_protect(flash_info_t *info, long sector, int prot)
{
	int retcode = 0;
	CONFIG_SYS_FLASH_WORD_SIZE value;
	volatile CONFIG_SYS_FLASH_WORD_SIZE *addr = (CONFIG_SYS_FLASH_WORD_SIZE *)(info->start[0]);
	volatile CONFIG_SYS_FLASH_WORD_SIZE *addr2 = (CONFIG_SYS_FLASH_WORD_SIZE *)info->start[sector];

	DEBUGF("get_size32: FLASH ADDR: %08x\n", (unsigned)addr);

	/* Write auto select command: read Manufacturer ID */
	addr[CONFIG_SYS_FLASH_ADDR0] = (CONFIG_SYS_FLASH_WORD_SIZE) 0x00AA00AA;
	addr[CONFIG_SYS_FLASH_ADDR1] = (CONFIG_SYS_FLASH_WORD_SIZE) 0x00550055;
	addr[CONFIG_SYS_FLASH_ADDR0] = (CONFIG_SYS_FLASH_WORD_SIZE) 0x00E000E0;


	addr2[0] = (CONFIG_SYS_FLASH_WORD_SIZE) 0x00A000A0;

	if(prot)
		addr2[0] = (CONFIG_SYS_FLASH_WORD_SIZE) 0x00000000;
	else
		addr2[0] = (CONFIG_SYS_FLASH_WORD_SIZE) 0x00010001;

	udelay(100);

	value = addr2[0];
	if (prot)
		retcode = (value != (CONFIG_SYS_FLASH_WORD_SIZE) 0x00000000);
	else
		retcode = (value != (CONFIG_SYS_FLASH_WORD_SIZE) 0x00010001);

	DEBUGF("## prot %d addr %08x value %04x retcode %d\n",prot, (unsigned int)addr2, (unsigned int)value, retcode);

	addr2[0] = (CONFIG_SYS_FLASH_WORD_SIZE) 0x00900090;
	addr2[0] = (CONFIG_SYS_FLASH_WORD_SIZE) 0x00000000;

	if (retcode == 0) {
		DEBUGF("## retcode %d\n",retcode);
		info->protect[sector] = prot;
	}

	DEBUGF("## retcode %d  end\n",retcode);
	return retcode;
}

/*
 * The following code cannot be run from FLASH!
 *
 */
static ulong flash_get_size(vu_long * addr, flash_info_t * info)
{
	short i;
	CONFIG_SYS_FLASH_WORD_SIZE value;
	ulong base = (ulong) addr;
	ulong increment;
	volatile CONFIG_SYS_FLASH_WORD_SIZE *addr2 = (CONFIG_SYS_FLASH_WORD_SIZE *) addr;

	DEBUGF("get_size32: FLASH ADDR: %08x\n", (unsigned)addr);

	/* Write auto select command: read Manufacturer ID */
	addr2[CONFIG_SYS_FLASH_ADDR0] = (CONFIG_SYS_FLASH_WORD_SIZE) 0x00AA00AA;
	addr2[CONFIG_SYS_FLASH_ADDR1] = (CONFIG_SYS_FLASH_WORD_SIZE) 0x00550055;
	addr2[CONFIG_SYS_FLASH_ADDR0] = (CONFIG_SYS_FLASH_WORD_SIZE) 0x00900090;
	udelay(1000);

	value = addr2[0];
	DEBUGF("FLASH MANUFACT: %x\n", value);

	switch (value) {
		case (CONFIG_SYS_FLASH_WORD_SIZE) AMD_MANUFACT:
			info->flash_id = FLASH_MAN_AMD;
			DEBUGF("## addr %p manufact %x good\n",addr, value);
			break;
		case (CONFIG_SYS_FLASH_WORD_SIZE) MX_MANUFACT:
			info->flash_id = FLASH_MAN_MX;
			DEBUGF("## addr %p manufact %x good\n",addr, value);
			break;
		default:
			info->flash_id = FLASH_UNKNOWN;
			info->sector_count = 0;
			info->size = 0;
			return (0);	/* no or unknown flash  */
	}

	value = addr2[1];	/* device ID            */
	DEBUGF("\nFLASH DEVICEID: %x\n", value);

	switch (value) {
		case (CONFIG_SYS_FLASH_WORD_SIZE)AMD_ID_MIRROR:
			DEBUGF("Mirror Bit flash: addr[14] = %08X  addr[15] = %08X\n",
					addr2[14], addr2[15]);
			switch(addr2[14]) {
				case (CONFIG_SYS_FLASH_WORD_SIZE)AMD_ID_GL128N_2:
					if (addr2[15] != (CONFIG_SYS_FLASH_WORD_SIZE)AMD_ID_GL128N_3) {
						DEBUGF("Chip: S29GL128N -> unknown\n");
						info->flash_id = FLASH_UNKNOWN;
					} else {
						DEBUGF("Chip: S29GL128N\n");
						info->flash_id += FLASH_S29GL128N;
						info->sector_count = 128;
						info->size = 0x01000000;
					}
					break;
				case (CONFIG_SYS_FLASH_WORD_SIZE)AMD_ID_GL256N_2:
					if (addr2[15] != (CONFIG_SYS_FLASH_WORD_SIZE)AMD_ID_GL256N_3) {
						DEBUGF("Chip: S29GL256N -> unknown\n");
						info->flash_id = FLASH_UNKNOWN;
					} else {
						DEBUGF("Chip: S29GL256N\n");
						info->flash_id += FLASH_S29GL256N;
						info->sector_count = 256;
						info->size = 0x02000000;
					}
					break;
				default:
					info->flash_id = FLASH_UNKNOWN;
					return(0);
			}
			break;

		default:
			info->flash_id = FLASH_UNKNOWN;
			return (0);	/* => no or unknown flash */
	}

	if (info->portwidth == 2)
		increment = 0x00020000;
	else
		increment = 0x00040000;

	/* set up sector start address table */
	for (i = 0; i < info->sector_count; i++)
		info->start[i] = base + (i * increment);

	/* issue bank reset to return to read mode */
	addr2[0] = (CONFIG_SYS_FLASH_WORD_SIZE) 0x00F000F0;
	udelay(100);

	/* Write auto select command: read Manufacturer ID */
	addr[CONFIG_SYS_FLASH_ADDR0] = (CONFIG_SYS_FLASH_WORD_SIZE) 0x00AA00AA;
	addr[CONFIG_SYS_FLASH_ADDR1] = (CONFIG_SYS_FLASH_WORD_SIZE) 0x00550055;
	addr[CONFIG_SYS_FLASH_ADDR0] = (CONFIG_SYS_FLASH_WORD_SIZE) 0x00E000E0;
	udelay(100);
	for (i = 0; i < info->sector_count; i++) {
		/* read sector protection at sector address, (A7 .. A0) = 0x02 */
		/* D0 = 1 if protected */
		addr2 = (volatile CONFIG_SYS_FLASH_WORD_SIZE *)(info->start[i]);
		DEBUGF("## addr %p i %d value %x\n",addr2, i, addr2[0]);
		info->protect[i] = (addr2[0] & 1) == 0;
	}

	return (info->size);
}

void flash_full_cache(void)
{
	return ;
	static int flag = 0;

	unsigned char *base  = (unsigned char *)CONFIG_SYS_FLASH_BASE;
	unsigned char *flash = (unsigned char *)PHYS_FLASH_1;

	const unsigned char *src;
	unsigned char *dst;
	unsigned int mem , i,j;

	if (flag) return;

	unsigned int size = flash_init();

	for( mem = 0 ;  mem < size ; mem += CONFIG_SYS_PAGED_FLASH_PAGESIZE ){
		dst = &base[mem];
		src = (unsigned char*)&flash[mem];
		printf("building flash page cache...\n");
		printf("memory[%p] <= flash[%p:%02x/%08x] size[%06x]\n"
			, dst , src , (((unsigned int)&flash[mem]>>22)-1)&0x3F
			, (unsigned int)&flash[mem]
			, CONFIG_SYS_PAGED_FLASH_PAGESIZE );
		memcpy( dst , src , CONFIG_SYS_PAGED_FLASH_PAGESIZE );
	}

	for (i=0; i<CONFIG_SYS_MAX_FLASH_BANKS; ++i)
		for(j = 0 ; j < CONFIG_SYS_MAX_FLASH_SECT ; j++ )
			if(0xbc000000 <= flash_info[i].start[j] &&
			   flash_info[i].start[j] < 0xbe000000) {
				flash_info[i].start[j] = flash_info[i].start[j] -
				                         PHYS_FLASH_1 + CONFIG_SYS_FLASH_BASE;
			}

	flag = 1;
	return;
}

#endif /* CONFIG_SYS_NO_FLASH */
